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Patent # Description
US-9,437,458 Method of electrically isolating leads of a lead frame strip
A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a...
US-9,437,440 Method for manufacturing a semiconductor device
A method for producing a semiconductor device is provided. The method includes: forming in a semiconductor substrate a plurality of semiconductor mesas...
US-9,436,190 Sensor circuit for detecting the setting of an integrated circuit
Methods and apparatus selecting settings for circuits according to various aspects of the present invention may operate in conjunction with a measurement...
US-9,435,849 Method for testing semiconductor dies and a test apparatus
A method includes: providing a test apparatus; providing an electrically conductive carrier; providing a semiconductor substrate having a first main face, a...
US-9,435,825 Multi-channel probe plate for semiconductor package test systems
A test apparatus includes a multi-channel probe plate having an electrically insulating body with opposing first and second main surfaces, and a plurality of...
US-9,435,662 Magneto-resistive angle sensor and sensor system using the same
A magneto-resistive angle sensor includes a first half bridge circuit including a first magneto-resistive element and a second magneto-resistive element, and a...
US-9,435,631 Discrete magnetic angle sensor device, a magnetic angle sensor arrangement, a method for generating an angle...
A discrete magnetic angle sensor device according to an embodiment includes a first magnetic field gradiometer and a second magnetic field gradiometer. The...
US-9,434,298 Direction indicator circuit for controlling a direction indicator in a vehicle
In various embodiments, a direction indicator circuit for controlling a direction indicator in a vehicle is provided. The direction indicator circuit may...
US-9,433,962 Application of fluids to substrates
Various embodiments relate to application of a fluid to a substrate. The fluid is locally heated, for example, to obtain a desired thickness profile.
US-9,432,759 Surface mountable microphone package, a microphone arrangement, a mobile phone and a method for recording...
A surface mountable microphone package comprises a first microphone and a second microphone. Furthermore, the surface mountable microphone package comprises a...
US-9,432,014 Circuit arrangement for preventing high current flow during energy-saving mode
In accordance with one embodiment, a circuit arrangement is provided including a circuit having a first terminal for a first supply potential and a second...
US-9,431,554 Semiconductor light trap device
Buried structures for silicon devices which alter light paths and thereby form light traps. The lights traps couple more light to a photosensitive surface of...
US-9,431,551 Circuit arrangement and method of forming a circuit arrangement
A circuit arrangement may be provided. The circuit arrangement may include a semiconductor substrate including a first surface, a second surface opposite the...
US-9,431,499 Method of manufacturing a stress-controlled HEMT
A method of manufacturing a semiconductor device includes providing a heterostructure body with a first doped region, a second doped region spaced apart from...
US-9,431,490 Power semiconductor device and method
A power semiconductor device includes a semiconductor body having a first side, a second side opposite the first side and an outer rim. The semiconductor body...
US-9,431,484 Vertical transistor with improved robustness
A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A...
US-9,431,398 Semiconductor chip having a circuit with cross-coupled transistors to thwart reverse engineering
According to one embodiment, a chip has a circuit with at least one p channel field effect transistor (FET); at least one n channel FET; a first and a second...
US-9,431,394 Power semiconductor package with gate and field electrode leads
A power semiconductor package includes a housing, a semiconductor chip embedded in the housing, and at least four terminals partially embedded in the housing...
US-9,431,392 Electronic circuit having adjustable transistor device
A transistor device includes at least one first type transistor cell including a drift region, a source region, a body region arranged between the source region...
US-9,431,382 Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor...
Disclosed is a semiconductor device arrangement including a first semiconductor device having a load path, and a plurality of second transistors, each having a...
US-9,431,379 Signal transmission arrangement
A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.
US-9,431,353 Method for manufacturing a digital circuit and digital circuit
A method for manufacturing a digital circuit is described comprising forming two field effect transistors, connecting the field effect transistors such that an...
US-9,429,616 Test method and test arrangement
A test method in accordance with one or more embodiments may include: providing a semiconductor device to be tested, the semiconductor device including at least...
US-9,429,605 Techniques for determining a resistance value
Some embodiments relate to an integrated circuit (IC). The IC determines a time-variant resistance of an sensing resistor, wherein a resistance of the sensing...
US-9,429,598 Current measurement and control of a semiconductor element based on the current measurement in a power...
A semiconductor arrangement may include a multiplicity of semiconductor elements with controlling paths and controlled paths, the controlled paths having...
US-9,428,381 Devices with thinned wafer
Methods, apparatuses and devices are described where a main wafer is irreversibly bonded to a carrier wafer and thinned to reduce a thickness of the main wafer,...
US-9,426,005 Method for indirect measurement of the phase delay of a RF-PWM modulator
A delay measurement system to measure a phase delay of a Radio Frequency-Pulse Width Modulated (RF-PWM) signal introduced in a Radio Frequency-Pulse Width...
US-9,425,788 Current sensors and methods of improving accuracy thereof
A method for operating a circuit includes providing a three terminal main transistor and a four terminal sense transistor having a field plate. The method...
US-9,425,784 Circuit having a power transistor and a drive circuit
A circuit having a power transistor and drive circuit is disclosed. One embodiment provides a drive terminal and a load path. The power transistor is integrated...
US-9,425,757 Apparatus and method for controlling an amplification gain of an amplifier, and a digitizer circuit and...
A controller for controlling an amplification gain of an amplifier for amplifying a high dynamic range signal for an analog to digital converter comprises an...
US-9,425,631 System and method for battery management
In accordance with an embodiment, a bi-directional charging circuit has a battery coupling node output configured to be coupled to a battery cell, an input...
US-9,425,622 Power converter circuit with AC output and at least one transformer
A power converter circuit includes a synchronization circuit that is configured to generate at least one synchronization signal. A series circuit includes a...
US-9,425,386 Electronic device with ring-connected hall effect regions
An electronic device includes a number of n Hall effect regions with n>1, wherein the n Hall effect regions are isolated from each other. The electronic...
US-9,425,385 Vertical hall effect device
A vertical Hall effect device includes at least four Hall effect regions which are partly decoupled from each other, and each of the at least four Hall effect...
US-9,425,327 Junction field effect transistor cell with lateral channel region
A junction field effect transistor cell of a semiconductor device includes a top gate region, a lateral channel region and a buried gate region arranged along a...
US-9,425,146 Semiconductor structure and method for making same
One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece;...
US-9,425,140 Capacitors in integrated circuits and methods of fabrication thereof
In one embodiment, a capacitor includes a first via level having first metal bars and first vias, such that the first metal bars are coupled to a first...
US-9,425,116 Integrated circuit package and a method for manufacturing an integrated circuit package
An integrated circuit package includes a package module including one or more circuit interconnections formed in a carrier, wherein at least one top-side...
US-9,425,090 Method of electrodepositing gold on a copper seed layer to form a gold metallization structure
An electrically conductive barrier layer is formed on a semiconductor substrate such that the barrier layer covers a first device terminal. A seed layer is...
US-9,425,063 Method of reducing an impurity concentration in a semiconductor body, method of manufacturing a semiconductor...
A method of reducing an impurity concentration in a semiconductor body includes irradiating the semiconductor body with particles through a first side of the...
US-9,424,741 Combined sense signal generation and detection
In an exemplary implementation, a detection circuit for regulating a power converter is configured to receive a combined sense signal comprising a first sense...
US-9,424,124 Error-tolerant memories
Methods and apparatuses relating to error-tolerant memories are provided. In one example embodiment, output signals from at least three memory devices are...
US-9,423,472 Magnetoresistive sensor module on the planar surface
In the method of manufacturing a magnetoresistive sensor module, at first a composite arrangement out of a semiconductor substrate and a metal-insulator...
US-9,423,471 Low offset vertical hall device and current spinning method
One embodiment of the present invention relates to a vertical Hall-effect device. The device includes at least two supply terminals arranged to supply...
US-9,423,450 Inductive charge balancing
Disclosed is a method for charge balancing in a charge storage arrangement having a plurality of charge storage cells connected in series, and a charge...
US-9,420,731 Electronic power device and method of fabricating an electronic power device
An electronic device comprises a power module comprising a first main surface and a second main surface opposite to the first main surface, wherein at least a...
US-9,420,391 Microphone configuration and calibration via supply interface
A microphone or a microphone sensor system operates with a sensor interface that receives a supply voltage at a supply terminal. The sensor interface detects a...
US-9,419,658 Digital modulator non-linearity correction
A nonlinear distorter is configured to mitigate nonlinearity from a nonlinear component of a nonlinear system. The nonlinear distorter operates to model the...
US-9,419,623 Semiconductor component and an operating method for a protective circuit against light attacks
A semiconductor component includes a semiconductor substrate, and a doped well having a well terminal and a transistor structure having at least one potential...
US-9,419,619 Chip and method for identifying a chip
A chip includes a logic circuit which has a plurality of transistors and is configured to carry out a logical data processing function, the transistors being...
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