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Patent # Description
US-7,304,546 Control loop filter
A feedback control loop having a filter response and a cut-off frequency comprises a system under control for generating an output signal being an output signal...
US-7,304,534 Amplifier arrangement, and method for compensating for an offset
An amplifier arrangement and a method for compensating for an offset in an amplifier is provided. A respective switch for connecting together the inputs in a...
US-7,304,525 Level converter
A level converter is disclosed. In one embodiment, the level converter includes a first and second input for applying a first voltage and first and second output...
US-7,304,519 Data latch, master/slave flipflop and frequency divider circuit
A data latch contains a supply connection, a reference ground potential connection and a data input. The input side of an inverter is connected to the data...
US-7,304,517 Duty cycle corrector
A duty cycle corrector, including a first, second circuit and a third circuit is disclosed. The third circuit is configured to obtain a threshold value in...
US-7,304,515 Device to be used in the synchronization of clock pulses, as well as a clock pulse synchronization process
The invention involves a clock pulse synchronization process as well as a device to be used in the synchronization of clock pulses, including a first delay...
US-7,304,495 Pseudodynamic off-chip driver calibration
A driver system, a driver calibration circuit arrangement for calibration of an impedance of a driver circuit arrangement, and a method for calibration of an...
US-7,304,349 Power semiconductor component with increased robustness
The invention relates to a power semiconductor component with increased robustness, in which a contact layer (13, 14) applied directly to a main surface (7, 11)...
US-7,304,342 Semiconductor memory cell and associated fabrication method
A semiconductor memory cell and an associated fabrication method are provided in which a storage capacitor is connected to a selection transistor. The storage...
US-7,303,970 Method of fabricating dielectric mixed layers and capacitive element and use thereof
The present invention provides a method for fabricating a capacitive element (100), a substrate (101) being provided as a first electrode layer of the capacitive...
US-7,303,961 Method for producing a junction region between a trench and a semiconductor zone surrounding the trench
A method for producing a junction region (2, 5, 6, 7) between a trench (3) and a semiconductor zone (2) surrounding the trench (3) in a trench semiconductor...
US-7,303,940 Semiconductor component having at least one organic semiconductor layer and method for fabricating the same
A semiconductor component has at least one organic semiconductor layer. The component also includes at least one protective layer for at least partially covering...
US-7,302,622 Integrated memory having a test circuit for functional testing of the memory
An integrated memory having a plurality of memory banks includes a test circuit for functional testing of the memory. A plurality of secondary sense amplifiers...
US-7,302,357 Concept for compensating piezo-influences on an integrated semiconductor circuit
A compensation signal, which derives the mechanical stress, which acts on an integrated semiconductor circuit, from two partial compensation signals, which are...
US-7,302,046 Method for the detection of impedances and for the qualification of the telephone lines
The invention relates to a method for detection of impedances, in particular along inductances, in telephone lines of the type with two metal wires as signal...
US-7,301,799 Memory cell array
A memory cell array is formed by providing a plurality of memory cells along a substrate, where each of the memory cells includes a storage element and an access...
US-7,301,779 Electronic chip and electronic chip assembly
A multiplicity of nanotubes are applied to at least one external chip metal contact of an electronic chip in order to make contact between the electronic chip...
US-7,301,411 Voltage-controlled oscillator circuit with analogue and digital actuation
A VCO circuit (20) has a coil (21) and, in parallel therewith, a constant capacitance (24) and adjustable capacitance elements (22, 23). A first capacitance...
US-7,301,376 Control circuit and method for driving a half-bridge circuit
A method is disclosed for controlling a first transistor in a half-bridge circuit which also includes a second transistor. The transistors can be controlled by...
US-7,301,353 Sensor element for providing a sensor signal, and method for operating a sensor element
A method for operating a sensor element having two contact terminal pairs, comprises steps of providing a first measurement value by applying a first controlled...
US-7,301,318 Circuit arrangement for voltage adjustment
A circuit arrangement for voltage regulation having a series regulator with a regulating amplifier and a charge pump that is connected downstream of the...
US-7,301,204 SOI component with increased dielectric strength and improved heat dissipation
A semiconductor component arrangement comprises a semiconductor substrate of a first conduction type, an insulation layer arranged on the substrate, and a...
US-7,301,192 Dram cell pair and dram memory cell array
Stack and trench memory cells are provided in a DRAM memory cell array. The stack and trench memory cells are arranged so as to form identical cell pairs each...
US-7,300,875 Post metal chemical mechanical polishing dry cleaning
Metal residue on a semiconductor surface resulting from metal chemical mechanical polishing ("CMP") process are eradicated using a dry clean process. The dry...
US-7,300,855 Reversible oxidation protection of microcomponents
In a method for the reversible oxidation protection of microcomponents, a substrate is provided, a silicon nitride layer is provided on the substrate in order to...
US-7,300,823 Apparatus for housing a micromechanical structure and method for producing the same
Apparatus for housing a micromechanical structure, and a method for producing the housing. The apparatus has a substrate having a main side on which the...
US-7,299,447 Method of testing a mapping of an electrical circuit
An electrical circuit can be described with a reference model that has a plurality of states and a plurality of state transitions. Acceptable and/or unacceptable...
US-7,299,388 Method and apparatus for selectively accessing and configuring individual chips of a semi-conductor wafer
A method and apparatus according to the present invention enable wafer chips to be configured with a single power on and off sequence and further enable a chip...
US-7,298,668 Semiconductor memory module with bus architecture
A semiconductor memory module, which is formed as an FBDIMM memory module, for example, has a planar design. In the 2R.times.4 configuration, semiconductor...
US-7,298,656 Process monitoring by comparing delays proportional to test voltages and reference voltages
An evaluation circuit includes a test circuit configured to provide a test voltage indicative of a characteristic of a semiconductor device, a reference circuit...
US-7,298,224 Amplifier circuit for an oscillator in a defined oscillating frequency range and oscillator circuit
An amplifier circuit for an oscillator in a defined oscillating frequency range includes a plurality of transconductors, wherein at least one transconductor has...
US-7,298,191 Reset-free delay-locked loop
A delay locked loop (DLL) includes a delay unit configured to delay an input clock signal by a specified amount to produce a delayed clock signal. A phase...
US-7,298,185 Circuit arrangement for production of a reset signal after a supply has fallen and risen again
The invention relates to a circuit arrangement for production of a reset signal after a supply voltage (Vdd) has fallen and risen again, which circuit...
US-7,298,184 Frequency divider circuit with controllable frequency division ratio and method for frequency division in a...
A frequency divider circuit is disclosed with at least one push-pull divider with adjustable division ratio and a connected converter device. The circuit...
US-7,298,182 Comparator using differential amplifier with reduced current consumption
A comparator circuit with reduced current consumption, and other circuits utilizing the same, are provided. The comparator circuit may achieve reduced current...
US-7,298,179 Digital clock switching means
A digital clock switching circuit and method is disclosed and is operable to deadlock-free switch a digital clock source for an integrated circuit. The circuit...
US-7,298,174 Circuit and method for generating an output signal
A circuit comprises an output terminal, an output driver for providing an output signal at the output terminal, a switching device for producing one or more...
US-7,298,122 Actuation circuit for a switch regulating the power consumption in a switching converter
An actuation circuit for a switch element regulating the power consumption of an inductive energy storage element in a switching converter, used to convert an...
US-7,298,013 Compound used to form a self-assembled monolayer, layer structure, semiconductor component having a layer...
Embodiments of the invention provide a semiconductor component and a method of manufacture thereof. A semiconductor component comprises: a gate electrode layer...
US-7,298,009 Semiconductor method and device with mixed orientation substrate
A semiconductor device includes a semiconductor body having semiconductor material of a first crystal orientation. A first transistor is formed in the...
US-7,298,004 Charge-trapping memory cell and method for production
The memory cell array comprises a plurality of parallel fins provided as bitlines arranged at a distance of down to about 40 nm from one another and having a...
US-7,297,983 Method for fabricating an integrated circuit on a semiconductor substrate
Integrated circuit device comprising a conductive layer and a poly-crystalline silicon layer, wherein the integrated circuit device further comprises an...
US-7,297,975 Non-volatile, resistive memory cell based on metal oxide nanoparticles, process for manufacturing the same and...
Disclosed is a non-volatile memory cell including a first conductive electrode region, a second conductive electrode region and a memory region disposed...
US-7,297,590 Method for fabricating an integrated pin diode and associated circuit arrangement
A method for producing an integrated PIN photodiode. The PIN photodiode contains a doped region of a first conduction type near the substrate and a doped region...
US-7,297,574 Multi-chip device and method for producing a multi-chip device
The present invention relates to a multi-chip device comprising a plurality of chip stacks each including a plurality of single chips stacked on each other,...
US-7,297,468 Method for forming a structure element on a wafer by means of a mask and a trimming mask assigned hereto
A method for forming a structure element in a layer arranged on a wafer by a trimming mask set, a developing step, and an etching step for the transfer of the...
US-7,296,250 Method and system for characterizing electronic circuitry
According to the invention a characteristic property of an electronic circuit component depending on at least one variable (X.sub.1, X.sub.2) is approximated by...
US-7,296,202 Semiconductor module with a configuration for the self-test of a plurality of interface circuits and test method
A semiconductor module with a plurality of interface circuits has a configuration for the self-test of interface circuits, with two equally sized groups of...
US-7,296,198 Method for testing semiconductor memory modules
A method for testing semiconductor memory modules in which data are stored in banks with an addressable matrix structure containing rows and columns. Defect...
US-7,296,134 Fast unaligned memory access system and method
A microprocessor system includes an address generator, an address selector, and memory system having multiple memory towers, which can be independently...
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