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Patent # Description
US-7,286,427 Integrated semiconductor memory device with test circuit for sense amplifier
An integrated semiconductor memory device includes sense amplifiers that are connected to in each case one bit line pair via controllable voltage generators. In...
US-7,286,207 Exposing a semiconductor wafer using two different spectral wavelengths and adjusting for chromatic aberration
A semiconductor wafer is exposed with a pattern from a mask or reticle in an exposure tool. The exposure tool has an adjustable lens system and a light source,...
US-7,286,205 Closing disk for immersion head
A closing disk for an immersion head of an immersion lithography system is disclosed. The closing disk makes contact with the immersion head at the edges of the...
US-7,285,490 Method for the producing an integrated circuit bar arrangement, in particular comprising a capacitor assembly,...
A method for production of an integrated circuit arrangement which contains a capacitor. A dielectric layer is structured with the aid of a two-stage etching...
US-7,285,470 Method for the production of a bipolar semiconductor component, especially a bipolar transistor, and...
The invention relates to a method for producing a bipolar semiconductor element, especially a bipolar transistor, and a corresponding bipolar semiconductor...
US-7,284,558 Enhanced megasonic based clean using an alternative cleaning chemistry
The present invention relates to the use of a C.sub.1 to C.sub.5 alcohol during the cleaning step. With the use of said alcohol, the surface tension of the...
US-7,283,419 Integrated semiconductor memory
An integrated semiconductor memory device includes a first memory zone, a second memory zone, first address connections and a second address connection. A second...
US-7,283,395 Memory device and method for operating the memory device
A memory device comprises a memory cell array (1) with a multitude of memory cells (111). Each of the memory cells (111) is assigned to one of a multitude of...
US-7,283,372 Circuit element having a first layer of an electrically insulating substrate material and method for...
Circuit element having a first layer composed of an electrically insulating substrate material, a first electrically conductive material which is in the form of...
US-7,283,002 Phase locked loop with a modulator
The invention provides a phase locked loop having a modulator which is based on a .SIGMA..DELTA. fractional N phase locked loop. In the forward path of the PLL,...
US-7,282,999 Method and device for generating a clock signal using a phase difference signal and a feedback signal
A method and a device for generating a clock signal (F.sub.out) are provided, wherein a digital phase difference signal (X) is formed depending on a phase...
US-7,282,995 Variable gain amplifier
A high frequency amplifier arrangement comprises a first stage with a modulator receiving a baseband signal, and a controllable current shunting device coupled...
US-7,282,992 Class D-amplifier
A class D-amplifier which amplifies an input signal applied to an signal input of said amplifier (21) to generate an amplified signal output by an signal output...
US-7,282,988 Bandgap reference circuit
A bandgap reference circuit is proposed. To remove parasitic effects, this includes the combination of a first circuit section (1), which generates a...
US-7,282,983 Secure and fast calculating unit
The calculating unit includes a dual rail input stage, a switching stage for a bit to be calculated and an output stage for an output bit, wherein the output...
US-7,282,773 Semiconductor device with high-k dielectric layer
A semiconductor device comprises a substrate including isolation regions and active regions, and a high-k dielectric layer proximate the substrate. The high-k...
US-7,282,451 Methods of forming integrated circuit devices having metal interconnect layers therein
Methods of forming metal interconnect layers include forming an electrically insulating layer having a contact hole therein, on a semiconductor substrate and...
US-7,281,228 Configurable memory system for embedded processors
An embedded processor architecture includes a processing core with configurable memory system. Memory components can be inserted, omitted and resized in...
US-7,281,227 Method and device for the computer-aided design of a supply network
A supply network is designed for a microelectronic circuit by a method for computer-aided design, in that an outline of the microelectronic circuit is detected...
US-7,281,184 Test system and method for testing a circuit
A test-device for testing an electric circuit comprises a data stream generator for generating a first data stream to be fed to an electric circuit which...
US-7,281,162 Program-controlled unit
A program-controlled unit (e.g., a microcontroller) in which trace information (e.g., selected addresses, data and/or control signals) that is processed by a...
US-7,280,617 Method to compensate for a step DC disturbance in a digital baseband signal in a homodyne radio receiver
In a method to compensate for a step DC disturbance (1) in a baseband signal in a homodyne radio receiver, the time profile of the step DC disturbance within a...
US-7,280,582 Apparatus and method for sub-chip offset correlation in spread-spectrum communication systems
An embodiment of the present invention described in the specification and the drawings is an apparatus and method for code correlation in spread spectrum...
US-7,280,393 MRAM memory cell having a weak intrinsic anisotropic storage layer and method of producing the same
An MRAM memory cell has a layer system of circular-disk-shaped layers. The memory cell includes two magnetic layers separated by a nonmagnetic intermediate...
US-7,280,392 Integrated memory device and method for operating the same
A memory device includes an array of memory cells that include a memory element having a non-reactive resistance whose magnitude is programmable to assume a...
US-7,280,065 Method for converting an analog input signal, and analog-to-digital converter
A method for converting an analog input signal into a digital value with successive approximation. A first comparison operation is provided before a first...
US-7,280,061 Digital-to-analog converter using a frequency hopping clock generator
Method and device for reducing the signal images at the output of a digital/analog converter. In a method for reducing the signal images at the output of a...
US-7,280,056 Sigma-delta converter and use thereof
A sigma-delta converter has a signal input for receiving a data word. A clock signal input is designed to supply a clock signal. The sigma-delta converter...
US-7,280,000 Apparatus and method for reducing power consumption within an oscillator
An oscillator according to the present invention reduces power consumption by enlarging the pulsewidth of an oscillator output pulse. Since this pulse disables...
US-7,279,946 Clock controller with integrated DLL and DCC
A clock controller for use with an off-chip driver and including a first delay element, a second delay element, a restore circuit, and an adjustment circuit. The...
US-7,279,943 Circuit arrangement receiving different supply voltages
A circuit arrangement (1) has a first circuit block (2) operating at a first supply voltage and a second circuit block (3) operating at a second supply voltage....
US-7,279,936 Logic basic cell, logic basic cell arrangement and logic device
A logic basic cell, a logic basic cell arrangement, and a logic device. A logic basic cell is provided for forming a logic combination of two data signals in...
US-7,279,888 Handling unit for electronic devices
A handling unit includes a frame, at least one arrangement module, and at least one chip carrier. The frame has at least one recess for the interchangeable...
US-7,279,881 Integrated circuit for regulating a voltage generator
An integrated circuit includes a voltage generator with a first controllable resistor and a second controllable resistor, through which a first input terminal...
US-7,279,742 Transistor structure with a curved channel, memory cell and memory cell array for DRAMs, and methods for...
A transistor structure having source/drain regions arranged in a horizontal plane along an x axis has a recess structure, which separates the two source/drain...
US-7,279,726 ESD protection device
An ESD protection device for protecting a circuit against electrostatic discharges. The ESD protection device having a series circuit of N diodes, each diode...
US-7,279,258 Method and arrangement for controlling focus parameters of an exposure tool
A pattern can be projected on a resist film layer deposited on a semiconductor surface. The pattern can include structural elements having different feature...
US-7,278,087 Hardware circuit for the puncturing and repetitive coding of data streams, and a method for operating the said...
An apparatus is used for outputting an input data block comprising a plurality of bits as an output data block with at least one puncturing or with at least one...
US-7,278,072 Method and auxiliary device for testing a RAM memory circuit
The testing of a RAM memory circuit containing a multiplicity of memory cells can in each case be selected in groups of n.gtoreq.1 memory cells by using an...
US-7,277,839 Method for numerically simulating an electrical circuit
A method using a computer program for numerically simulating an electrical circuit, in a computer system, having a plurality of nodes and a plurality of circuit...
US-7,277,689 Transmission arrangement with power regulation
In a transmission arrangement with power regulation, feedback from an output of a modulator to a digital signal processor is effected via a transmission power...
US-7,277,350 Implementation of a fusing scheme to allow internal voltage trimming
Methods and apparatuses for adjusting trim settings for internally generated voltages of an integrated circuit device are provided. In one embodiment the...
US-7,277,338 Method and device for testing semiconductor memory devices
A test method for a semiconductor memory device having a bidirectional data strobe terminal for a data strobe signal, and having at least one data terminal for a...
US-7,277,335 Output circuit that turns off one of a first circuit and a second circuit
An output circuit including a first circuit configured to provide a first output signal, a second circuit configured to provide a second output signal, and a...
US-7,277,312 Integrated semiconductor memory with an arrangement of nonvolatile memory cells, and method
In integrated semiconductor memories whose stored information is represented by the magnitude of the ohmic resistance of layer stacks with a respective layer...
US-7,276,978 Phase locked loop comprising a sigma-delta modulator
The invention is directed to a phase locked loop with a .SIGMA..DELTA. modulator. A multimodulus divider in the feedback path of the PLL is actuated by the...
US-7,276,896 Test apparatus and method for testing circuit units to be tested
The invention provides a test apparatus for testing a circuit unit (101) to be tested having a test system (100), a control bus (102) for transferring control...
US-7,276,803 Semiconductor component and method for fabricating
Semiconductor components having a semiconductor body which includes a semiconductor base surface have to be sealed with a molding compound in order to protect...
US-7,276,785 Electronic module, panel having electronic modules which are to be divided up, and process for the production...
The invention relates to an electronic module having electronic components, which are arranged in vertically staggered component layers, which are electrically...
US-7,276,783 Electronic component with a plastic package and method for production
An electronic component with a plastic package and to a method for its production, includes a semiconductor chip. An underside of the plastic package has...
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