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Patent # Description
US-7,295,000 Method for detecting disturbances when determining the rotational speed of a rotor and evaluation circuit
The invention relates to a rotary encoder and to a method for detecting disturbances in such a rotary encoder. In this case, vibrations or other disturbances are...
US-7,294,916 Semiconductor device with a thinned semiconductor chip and method for producing the thinned semiconductor chip
A semiconductor device with a thinned semiconductor chip and a method for producing the latter is disclosed. In one embodiment, the thinned semiconductor chip...
US-7,294,910 Electronic component with multilayered rewiring plate and method for producing the same
The invention relates to an electronic component having a multilayered rewiring plate, which carries a circuit chip, in particular a magnetic memory chip, and...
US-7,294,902 Trench isolation having a self-adjusting surface seal and method for producing one such trench isolation
The invention relates to a trench isolation with a self-aligning surface sealing and a fabrication method for said surface sealing. In this case, the surface...
US-7,294,885 Reverse blocking semiconductor component with charge compensation
The invention relates to a field effect controllable semiconductor component, comprising a semiconductor body with a first terminal zone and a second terminal...
US-7,294,853 Substrate for mounting a semiconductor
A substrate (1) is formed from a non-electrically conducting material and is for mounting a semiconductor chip (10). The substrate has a semiconductor chip...
US-7,294,851 Dense seed layer and method of formation
Methods of forming dense seed layers and structures thereof. Seed layers comprising a monolayer of molecules having a density of about 0.5 or greater may be...
US-7,294,553 Plasma-enhanced chemical vapour deposition process for depositing silicon nitride or silicon oxynitride,...
A plasma-enhanced chemical vapor deposition process for depositing relatively high dielectric constant silicon nitride or oxynitride to form an MIM capacitor is...
US-7,293,250 Method of modeling physical layout of an electronic component in channel simulation
A method of developing the physical layout of an electronic component in a data bus connected logic analog system includes: providing a data bus connected logic...
US-7,293,190 Noisy clock test method and apparatus
A clock filter for use in filtering an external clock signal to create an internal clock signal for use by an electronic device is provided. The clock filter...
US-7,293,151 Memory system and method for transferring data therein
A memory system is functionally designed so that, despite operation without an error correction device, memory chips of a memory module that are actually...
US-7,292,847 Method for coordinating tasks in a GSM network
In a mobile unit of a GSM network (Global System for Mobile Communications), various tasks are performed under real-time constraints. After starting an execution...
US-7,292,662 Feed forward clock and data recovery unit
Disclosed is a feed forward clock and data recovery unit for recovering a received serial data bit stream having a feed forward phase tracking unit for tracking...
US-7,292,631 Feed forward equalizer and a method for analog equalization of a data signal
A feed forward equalizer for analog equalization of a data signal received over a data transmission channel comprising a Master Delay Locked Loop (MDLL) for...
US-7,292,488 Temperature dependent self-refresh module for a memory device
A self-refresh module includes an oscillator configured to provide a first signal having a first frequency, a trimming divider configured to trim the first...
US-7,292,479 Memory device with multistage sense amplifier
A memory device with a multistage sense amplifier is disclosed. According to one aspect, a memory device has a memory cell array having at least one memory cell,...
US-7,292,466 Integrated circuit having a resistive memory
A memory includes a first resistive memory cell, a current source configured to provide an input current indicating a desired resistance level for the first...
US-7,292,099 Amplifier arrangement and method for operation of an amplifier arrangement
An amplifier arrangement is provided having a first differential amplifier stage and a second differential amplifier stage, which are connected to one another...
US-7,292,080 Delay locked loop using a FIFO circuit to synchronize between blender and coarse delay control signals
Embodiments of the present invention generally provide improved techniques and circuit configurations for a delay-locked loop (DLL) circuit. In one embodiment, a...
US-7,292,062 Distribution of signals throughout a spine of an integrated circuit
A system and method for distributing signals throughout an integrated circuit (IC). The system comprises a transmitter unit and a plurality of receiver units....
US-7,292,046 Simulated module load
A circuit and method of operation for simulating a capacitive load for an integrated circuit or chip. The circuit adds a small capacitor to a test cell that...
US-7,291,907 Chip stack employing a flex circuit
A chip stack employing BGA or FBGA integrated circuit chip packages is provided. Two chip packages have bottom surfaces attached with sets of electrical...
US-7,291,902 Chip component and method for producing a chip component
A chip component (1) includes a semiconductor body (2), in which at least one switchable element (6, 62) is arranged in a partial region (24) of the...
US-7,291,899 Power semiconductor component
A semiconductor component suitable for use as a power semiconductor component and method of making a semiconductor component is disclosed. In one embodiment, the...
US-7,291,881 Bit line structure and method of fabrication
The invention relates to a bit line structure having a surface bit line (DLx) and a buried bit line (SLx), the buried bit line (SLx) being formed in a trench...
US-7,291,877 Integrated circuit arrangement with capacitor
An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far...
US-7,291,569 Fluids for immersion lithography systems
Fluids for use in immersion lithography systems are disclosed. A resistivity-altering substance is introduced into a fluid, making it more conductive. The fluid...
US-7,291,560 Method of production pitch fractionizations in semiconductor technology
Spacers are formed on sidewalls of striplike parts of a pattern layer of periodic structure. The pattern layer is removed, and the spacers are covered with a...
US-7,291,547 Filter device and method for fabricating filter devices
A filter device and a method for fabricating filter devices can package filters, especially acoustic wave filters, by bonding a carrier (substrate) wafer...
US-7,291,533 Method for production of trench DRAM cells and a trench DRAM cell array with fin field-effect transistors with...
A method for producing trench DRAM cells, each having a trench capacitor and a fin field-effect transistor with a curved channel (CFET) for addressing the trench...
US-7,291,532 Low resistance contact in a semiconductor device
In a method for manufacturing a contact electrically contacting an electrically conductive silicon structure, a substrate with a surface is provided, the...
US-7,291,526 Semiconductor device and method of manufacture thereof
A dielectric material layer is formed over a workpiece, a metal layer is formed over the dielectric material layer, and a semiconductive material layer is formed...
US-7,290,289 Processor with several calculating units
A processor comprises a first calculating unit, a second calculating unit and a control means for controlling the two calculating units, such that they...
US-7,290,120 Microprocessor having a power-saving fetch and decoding unit for fetching and decoding compressed program...
A microprocessor having a power-saving fetch and decoding unit for fetching and decoding compressed program instructions and having a program instruction...
US-7,290,022 Method and filter arrangement for digital recursive filtering in the time domain
A method and apparatus for fast digital filtering that requires only filter stages of first and second order. A desired rational filter transfer function is...
US-7,289,542 Method for operating a PLL frequency synthesis circuit
In a method for operating a PLL frequency synthesis circuit, the circuit is in an active state and synthesizes a first output frequency during a first data...
US-7,289,374 Circuit and method for adjusting threshold drift over temperature in a CMOS receiver
A receiver for use in a device such as a memory device is provided. The receiver circuit is located on the same integrated circuit as a temperature sensor (or...
US-7,289,350 Electronic device with a memory cell
The present invention relates to an electronic device comprising a memory cell with a resistive storage element having a first terminal and a second terminal....
US-7,289,231 Apparatus and method for determining physical properties of a mask blank
An apparatus for determining physical properties of a mask blank. The apparatus includes, for example, an illumination device for radiating a predetermined light...
US-7,289,005 Polar modulator and a method for modulation of a signal
A polar modulator contains a phase locked loop which is designed to emit a radio-frequency signal at one frequency to one output, with the frequency being...
US-7,288,989 Low-noise amplifier with a transformer
An amplifier circuit includes a transistor having a control terminal, a first and a second terminal, a signal input terminal coupled to the control terminal of...
US-7,288,931 Method for determining residual error compensation parameters for a magnetoresistive angle sensor and method...
In a method of determining residual error compensation parameters for a magnetoresistive angle sensor providing a first measurement signal depending on a...
US-7,288,812 Semiconductor memory with virtual ground architecture
Insulation regions in the manner of STI isolations, which run transversely with respect to the word lines, isolate the source/drain regions of adjacent memory...
US-7,288,786 Integrated circuit configuration with analysis protection and method for producing the configuration
During the creation of wiring plans for logic modules, the regions which are left free of interconnects by synthesis methods in upper metal planes are filled to...
US-7,288,435 Method for producing a cover, method for producing a packaged device
In a method for producing a cover for a region of a substrate, first a frame structure is produced in the region of the substrate, and then a cap structure is...
US-7,286,621 Reception method and receiver array for a duplex transmission system
The invention relates to a duplex transmission system, wherein an echo compensation signal (yec(kt)) is generated which is combined with a receive signal (u(t))...
US-7,286,605 Method and apparatus for reducing a crest factor of a multi-tone data signal
A crest factor reduction circuit for reducing a crest factor (CF) of a multi-tone-data signal which is transmitted in a predetermined transmission frequency...
US-7,286,534 SRAM based cache for DRAM routing table lookups
A router (101) includes one or more input ports (104) and one or more output ports (112). The router (101) includes a lookup table (105) to determine routing of...
US-7,286,433 Method for activating a plurality of word lines in a refresh cycle, and electronic memory device
An electronic memory device for storing data comprises a memory cell array arranged in at least one memory bank and comprising memory cells in which information...
US-7,286,432 Temperature update masking to ensure correct measurement of temperature when references become unstable
Embodiments of the invention generally provide methods and apparatuses for updating a temperature measurement. In one embodiment, the temperature measurement is...
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