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Patent # Description
US-7,280,061 Digital-to-analog converter using a frequency hopping clock generator
Method and device for reducing the signal images at the output of a digital/analog converter. In a method for reducing the signal images at the output of a...
US-7,280,056 Sigma-delta converter and use thereof
A sigma-delta converter has a signal input for receiving a data word. A clock signal input is designed to supply a clock signal. The sigma-delta converter...
US-7,280,000 Apparatus and method for reducing power consumption within an oscillator
An oscillator according to the present invention reduces power consumption by enlarging the pulsewidth of an oscillator output pulse. Since this pulse disables...
US-7,279,946 Clock controller with integrated DLL and DCC
A clock controller for use with an off-chip driver and including a first delay element, a second delay element, a restore circuit, and an adjustment circuit. The...
US-7,279,943 Circuit arrangement receiving different supply voltages
A circuit arrangement (1) has a first circuit block (2) operating at a first supply voltage and a second circuit block (3) operating at a second supply voltage....
US-7,279,936 Logic basic cell, logic basic cell arrangement and logic device
A logic basic cell, a logic basic cell arrangement, and a logic device. A logic basic cell is provided for forming a logic combination of two data signals in...
US-7,279,888 Handling unit for electronic devices
A handling unit includes a frame, at least one arrangement module, and at least one chip carrier. The frame has at least one recess for the interchangeable...
US-7,279,881 Integrated circuit for regulating a voltage generator
An integrated circuit includes a voltage generator with a first controllable resistor and a second controllable resistor, through which a first input terminal...
US-7,279,742 Transistor structure with a curved channel, memory cell and memory cell array for DRAMs, and methods for...
A transistor structure having source/drain regions arranged in a horizontal plane along an x axis has a recess structure, which separates the two source/drain...
US-7,279,726 ESD protection device
An ESD protection device for protecting a circuit against electrostatic discharges. The ESD protection device having a series circuit of N diodes, each diode...
US-7,279,258 Method and arrangement for controlling focus parameters of an exposure tool
A pattern can be projected on a resist film layer deposited on a semiconductor surface. The pattern can include structural elements having different feature...
US-7,278,087 Hardware circuit for the puncturing and repetitive coding of data streams, and a method for operating the said...
An apparatus is used for outputting an input data block comprising a plurality of bits as an output data block with at least one puncturing or with at least one...
US-7,278,072 Method and auxiliary device for testing a RAM memory circuit
The testing of a RAM memory circuit containing a multiplicity of memory cells can in each case be selected in groups of n.gtoreq.1 memory cells by using an...
US-7,277,839 Method for numerically simulating an electrical circuit
A method using a computer program for numerically simulating an electrical circuit, in a computer system, having a plurality of nodes and a plurality of circuit...
US-7,277,689 Transmission arrangement with power regulation
In a transmission arrangement with power regulation, feedback from an output of a modulator to a digital signal processor is effected via a transmission power...
US-7,277,350 Implementation of a fusing scheme to allow internal voltage trimming
Methods and apparatuses for adjusting trim settings for internally generated voltages of an integrated circuit device are provided. In one embodiment the...
US-7,277,338 Method and device for testing semiconductor memory devices
A test method for a semiconductor memory device having a bidirectional data strobe terminal for a data strobe signal, and having at least one data terminal for a...
US-7,277,335 Output circuit that turns off one of a first circuit and a second circuit
An output circuit including a first circuit configured to provide a first output signal, a second circuit configured to provide a second output signal, and a...
US-7,277,312 Integrated semiconductor memory with an arrangement of nonvolatile memory cells, and method
In integrated semiconductor memories whose stored information is represented by the magnitude of the ohmic resistance of layer stacks with a respective layer...
US-7,276,978 Phase locked loop comprising a sigma-delta modulator
The invention is directed to a phase locked loop with a .SIGMA..DELTA. modulator. A multimodulus divider in the feedback path of the PLL is actuated by the...
US-7,276,896 Test apparatus and method for testing circuit units to be tested
The invention provides a test apparatus for testing a circuit unit (101) to be tested having a test system (100), a control bus (102) for transferring control...
US-7,276,803 Semiconductor component and method for fabricating
Semiconductor components having a semiconductor body which includes a semiconductor base surface have to be sealed with a molding compound in order to protect...
US-7,276,785 Electronic module, panel having electronic modules which are to be divided up, and process for the production...
The invention relates to an electronic module having electronic components, which are arranged in vertically staggered component layers, which are electrically...
US-7,276,783 Electronic component with a plastic package and method for production
An electronic component with a plastic package and to a method for its production, includes a semiconductor chip. An underside of the plastic package has...
US-7,276,781 Multichip module for LOC mounting and method for producing the multichip module
A multichip module for leads-on-chip mounting is described. The multichip module has a lead-frame, a common, contiguous part of a wafer slice disposed in the...
US-7,276,300 Microelectronic structure having a hydrogen barrier layer
The invention relates to a microelectronic structure which provides improved protection of a hydrogen-sensitive dielectric against hydrogen contamination....
US-7,275,189 Memory module and method for operating a memory module in a data memory system
Memory modules based on DDR-DRAMs are provided with a buffer and error checking module, which integrates an error data memory and a buffer/redriver functionality...
US-7,275,173 Method for measuring and compensating for skews of data transmission lines by compensating for skew by delay...
Method for measuring and compensating skews of data transmission lines connecting at least one data transmission device with a data reception device via a...
US-7,274,867 System and method for determining the temperature of a semiconductor wafer
A system and method for determining the temperature of a semiconductor wafer at the time of thermal contact of the semiconductor wafer with a temperature sensing...
US-7,274,763 Unit for determining the sampling phase
The invention relates to an apparatus and a method for ascertaining and correcting the optimum sampling time for an oversampled input bit stream. This involves...
US-7,274,762 Calculation circuit for calculating a sampling phase error
A calculation circuit for calculating a sampling phase error is provided. According to one aspect, a calculation circuit includes a first delay element chain...
US-7,274,755 Receiver
Receiver for Receiving Data Frames. According to one aspect, a receiver for receiving data frames which contain information data includes a signal input....
US-7,274,597 Method of programming of a non-volatile memory cell comprising steps of applying constant voltage and then...
A method and arrangement are provided for programming an electrically erasable programmable read-only memory cell capable of storing at least one information...
US-7,274,595 Nonvolatile memory device for storing data and method for erasing or programming the same
A method for erasing or programming a nonvolatile memory device comprising a memory cell, a sense amplifier, and a page memory, the method comprising the steps...
US-7,274,312 High rate coding for media noise
An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b.sub.1, b.sub.2, b. . . b.sub.k to...
US-7,274,240 Clock control cell
A clock control cell for production of an output clock signal from an input clock signal has a hold element and an output stage. The hold element is preceded by...
US-7,274,225 Method for driving a semiconductor switching element in a half-bridge and circuit arrangement having a half-bridge
A method and related apparatus drives a first semiconductor switching element, the load path of which is connected in series with a load path of a second...
US-7,274,218 Integrated circuit
An integrated circuit includes a first and a second amplifier circuit (10, 20), which are in each case driven by an input signal (Vin) having a high and a low...
US-7,274,110 Semiconductor component having a CSP housing
The invention relates to a semiconductor component for mounting on a printed circuit board. The semiconductor component includes a housing that at least...
US-7,274,107 Semiconductor device
The present invention relates to semiconductor devices. According to the present invention a semiconductor device is described, comprising: a substrate for...
US-7,274,102 Contacting device, testing method and corresponding production method
A contacting device comprises a carrier device with a first surface, a plurality of first terminal regions on the first surface, at least one elastic elevation...
US-7,274,092 Semiconductor component and method of assembling the same
A semiconductor component includes at least one semiconductor power switch, wherein a gate electrode and at least two source regions are disposed on the upper...
US-7,274,077 Trench transistor
A trench transistor has a cell array, in which at least one cell array trench (2) is provided, and an edge structure framing the cell array. An edge trench (15)...
US-7,274,069 Memory cell
In a memory cell, in a trench, a layer sequence comprising a first oxide layer, a nitride layer provided on the first oxide layer, and a second oxide layer,...
US-7,274,060 Memory cell array and method of forming the same
A memory cell array includes memory cells with storage capacitor and an access transistor. The access transistors are formed in active areas. The memory cell...
US-7,273,821 Method for producing a porous coating
The present invention relates to a process for producing a porous layer adhering to a substrate, which comprises the steps: a. preparation of a composition...
US-7,273,805 Redistribution layer with microstrips
A semiconductor device includes a completed semiconductor chip and a dielectric layer overlying the completed semiconductor chip. A redistribution layer overlies...
US-7,273,790 Method for fabricating trench capacitor with insulation collar electrically connected to substrate through...
Fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected thereto on one side through a buried contact, in...
US-7,273,786 Method for fabricating a semiconductor memory cell
In order to be able to store information in a non-volatile fashion as compactly and as flexibly as possible in a semiconductor memory cell, the original gate...
US-7,273,638 High density plasma oxidation
A method of oxidizing a substrate having area of about 30,000 mm.sup.2 or more. The surface is preferably comprised of silicon-containing materials, such as...
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