Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: infineon





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,323,870 Magnetoresistive sensor element and method of assembling magnetic field sensor elements with on-wafer...
A method of performing an on-wafer function testis provided for multiple magnetic field sensor elements on a wafer. Each sensor element includes a ...
US-7,323,861 Contact plate for use in standardizing tester channels of a tester system and a standardization system having...
One embodiment of the invention provides a standardization module for use in standardizing tester channels of a tester unit using a standardization unit for...
US-7,323,388 SONOS memory cells and arrays and method of forming the same
A trench (2) is fabricated in a silicon body (1). The walls (4) of the trench are provided with a nitrogen implantation (6). An oxide layer between the...
US-7,323,383 Method for fabricating an NROM memory cell arrangement
In the method, trenches (9) are etched and, in between, bit lines (8) are in each case arranged on doped source drain/regions (3). Dopant is introduced into the...
US-7,323,359 Mounting method for a semiconductor component
A mounting method for a semiconductor component. The method includes application of solder material to the semiconductor component, application of at least one...
US-7,321,628 Data transmission system with reduced power consumption
System and method for reducing power consumption and noise in a transmission system with an asymmetrically terminated transmission line. A preferred embodiment...
US-7,321,514 DRAM memory cell arrangement
The present invention relates to a memory cell arrangement comprising a multiplicity of DRAM memory cells which are arranged in cell rows and cell columns and...
US-7,321,497 Electronic circuit apparatus and method for stacking electronic circuit units
The invention provides an electronic circuit apparatus having a plurality of electronic circuit units (101a-101n), a circuit board (102) and a connection unit...
US-7,321,240 Driver circuit for binary signals
The invention relates to a driver circuit for binary signals, said circuit having two branch circuits which are connected in parallel with one another between an...
US-7,321,235 Input circuit for an integrated circuit
An integrated circuit includes a functional circuit, a setting memory for storing a setting data item and an input circuit for receiving signals via an input...
US-7,321,097 Electronic component comprising an electrically conductive connection consisting of carbon nanotubes and a...
The invention provides in a preferred embodiment an electronic component comprising a first conductive layer, a non-conductive layer and a second conductive...
US-7,320,934 Method of forming a contact in a flash memory device
A method of forming a contact between a bitline and a local interconnect in a flash memory device comprises forming a hard mask layer on a planarized surface...
US-7,319,598 Electronic component with a housing package
The invention relates to an electronic component with a housing package comprising a number of layers of plastic with at least one buried interconnect layer and...
US-7,319,322 Deformation sensor and method for detecting a deformation
A sensor has a substrate having a mechanically deformable region, a magnetostrictive spin-valve sensor element being arranged to detect a mechanical deformation...
US-7,319,270 Multi-layer electrode and method of forming the same
An interconnect includes an opening formed in a dielectric layer. A conductive barrier is deposited in the opening, over which a first conductive layer is...
US-7,319,263 Semiconductor component with switching element configured to reduce parasitic current flow
A semiconductor component is described. In one embodiment, the semiconductor component includes a switching element integrated in the semiconductor component...
US-7,319,235 Resistive semiconductor element based on a solid-state ion conductor
A nonvolatile, resistively switching memory cell has a layer of a porous dielectric between a first electrode. The dielectric is not a chalcogenide.
US-7,319,223 Method and apparatus for characterizing a recess located on a surface of a substrate
Method and apparatus for characterizing a recess located on a surface of a substrate are provided. One embodiment of the invention provides a method for...
US-7,318,993 Resistless lithography method for fabricating fine structures
A resistless lithography method for fabricating fine stiuctures is disclosed. IN an embodiment, a semiconductor mask layer (HM) may be formed on a carrier...
US-7,318,307 Method and device for packaging and transporting electronic components
The invention relates to an apparatus and a method for packaging and for transporting electronic devices. The devices include coverings made of a material that...
US-7,317,768 Demodulator and demodulation method for demodulating received signals
The invention relates to a demodulator and also a demodulation method and enables a reliable demodulation even when the intermediate frequency range overlaps the...
US-7,317,657 Semiconductor memory device, system with semiconductor memory device, and method for operating a semiconductor...
The invention relates to a semiconductor memory device, a system with a semiconductor memory device, and a method for operating a semiconductor memory device,...
US-7,317,656 Semi-conductor memory component, and a process for operating a semi-conductor memory component
The invention relates to a semi-conductor memory component and process for operating a semi-conductor memory component, including activating the memory cells of...
US-7,317,631 Method for reading Uniform Channel Program (UCP) flash memory cells
A flash memory cell can be read by selecting a local bit line. A read potential is applied to a memory cell transistor associated with the local bit line thereby...
US-7,317,603 Integrated circuit with electrostatic discharge protection
An integrated circuit with electrostatic discharge protection includes a first transistor with a source terminal, a drain terminal and a gate terminal, and a...
US-7,317,323 Signal test procedure for testing semi-conductor components and a test apparatus for testing semi-conductor...
The invention relates to a test apparatus for testing semi-conductor components, and to a signal testing procedure, to be used especially during the testing of...
US-7,317,252 Ohmic contact configuration
A contact configuration has an ohmic contact between a metalization layer and a semiconductor body of monocrystalline semiconductor material. An amorphous...
US-7,317,251 Multichip module including a plurality of semiconductor chips, and printed circuit board including a plurality...
A multichip module includes at least one first semiconductor chip and at least one second semiconductor chip. The semiconductor chips are arranged in coplanar...
US-7,317,248 Memory module having memory chips protected from excessive heat
The invention relates to a memory module having a printed circuit board; having one or more memory chips which are arranged in a first region of the printed...
US-7,317,201 Method of producing a microelectronic electrode structure, and microelectronic electrode structure
In a method for producing a microelectronic electrode structure a first wiring plane is prepared, an insulating region on the first wiring plane is provided, a...
US-7,316,980 Method for forming ferrocapacitors and FeRAM devices
Ferrocapacitors having a vertical structure are formed by a process in which a ferroelectric layer is deposited over an insulator. In a first etching stage, the...
US-7,316,962 High dielectric constant materials
A capacitor (10) includes a substrate (12) and two metal electrodes (14, 18). A dielectric layer (16) is formed between the electrodes. Preferably, the...
US-7,316,951 Fabrication method for a trench capacitor having an insulation collar
The present invention provides a fabrication method for a trench capacitor having an insulation collar (10) in a silicon substrate (1), having the steps of:...
US-7,316,933 Method for producing an annular microstructure element
An annular microstructure element, in particular an annularly arranged monolayer or multilayer thin film, is formed over a substrate (S), e.g., for use in a...
US-7,315,998 Integrated circuit arrangement with intermediate materials and associated components
An integrated circuit arrangement having a metallization layer, an interconnect dielectric, electrically conductive interconnect intermediate material,...
US-7,315,969 Memory module with a test device
A memory module, which enables a module-internal, cross-chip electrical functional test of a plurality of integrated memory chips arranged on a printed circuit...
US-7,315,586 Adaptive searcher threshold setting using consecutive ISCP measurements
Dynamic adjustment of searcher thresholds used to detect propagation paths of a communications signal transmitted from a transmitter to the base band receiver....
US-7,315,467 Hybrid memory cell for spin-polarized electron current induced switching and writing/reading process using such...
The present invention relates to a magnetoresistive hybrid memory cell comprising a first stacked structure comprising a magnetic tunnel junction including first...
US-7,315,454 Semiconductor memory module
A semiconductor memory module includes an electronic printed circuit board with a contact strip and a plurality of semiconductor memory chips of identical type...
US-7,315,271 Analog-to-digital converter
The invention relates to an analog-to-digital converter. The analog-to-digital converter, for conversion of a signal for digitization into a digital signal,...
US-7,314,803 Method for producing a semiconductor structure
In a method for producing a semiconductor structure a semiconductor a substrate with a top surface is provided. A gate dielectric layer is provided on the top...
US-7,313,741 Integrated semiconductor memory
An integrated semiconductor memory includes memory cells that store a first data record has at least one datum with a first or second data value and a second...
US-7,313,732 Memory arrangement in a computer system
A memory arrangement in a computer system can have at least one memory module with semiconductor components, which are arranged on the memory module, can be...
US-7,313,498 Device and method for testing an electrical circuit
A method and device for testing an electrical circuit, which do not require a thorough electrical circuit simulation but reliably identifying circuit faults....
US-7,313,374 Low-latency DC compensation
A method of performing DC estimation and correction in the presence of an automatic gain control function introduces no long-term delay of the signal. When the...
US-7,313,211 Method and apparatus for phase detection
The present invention relates to a method and apparatus for generating an output signal in dependence on a phase difference between two periodic signals. The...
US-7,313,204 Method and device for transmitting and identifying a modulation type in digital communication systems by way of...
Data symbols in the training sequence are rotated at the transmitter end through a phase rotation factor which is specific for a given modulation type that is...
US-7,313,171 Apparatus for data transmission path detection
A method and apparatus for detecting paths of a received signal by analyzing a delay power profile of the received signal comprises a detection of peaks in the...
US-7,313,162 Apparatus and method for calculating and implementing a Fibonacci mask for a code generator
An apparatus and method for calculating and implementing a Fibonacci mask for a code generator is disclosed herein. The first step receives a desired code offset...
US-7,313,147 Network device and its data transmission method
A network device for transmitting data of a host system to a network including a buffer for storing the data, a first transmission interface providing a control...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.