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Lateral semiconductor transistor
A lateral semiconductor transistor is disclosed. In one embodiment, the transistor includes a semiconductor body, in which a source region, a body region and a...
DRAM cell arrangement with vertical MOS transistors
The invention is related to a DRAM cell arrangement with vertical MOS transistors. Channel regions arranged along one of the columns of a memory cell matrix are...
Fabricating memory components (PCRAMS) including memory cells based on a
layer that changes phase state
A method is describe for fabricating memory components including memory cells based on an active material of an active layer, the phase state of which can be...
Method for determining a matrix of transmission cross coefficients in an
optical proximity correction of mask...
The present invention relates to a method for determining a matrix of transmission cross coefficients w for an optical modeling in an optical proximity...
Controlling processing of data stream elements using a set of specific
A device (1) to control processing of data elements (data_i), in which a thread is assigned to each data element (data_i), comprises a first unit (CS), which,...
Device and method for treating a state of a memory
Device for treating a memory state resulting from incomplete writing or erasing of data. The memory includes memory cells organized in a plurality of pages each...
Circuit configuration for receiving a data signal
In a clock-synchronously operated semiconductor memory, particularly a DDR SDRAM, data are read in clock-synchronously with respect to a data strobe signal in...
Method and device for storing data packets
To enable data packets, which can be present in different data transmission formats and which are to be routed in a communication network, to be stored as simply...
An interface apparatus having a first and a second buffer storage unit, the first buffer storage unit being associated with a first domain and the second buffer...
Energy adjusted write pulses in phase-change memories
A memory cell device that includes a plurality of phase-change memory cells, at least one write pulse generator, and at least one temperature sensor. The...
Memory device including electrical circuit configured to provide
reversible bias across the PMC memory cell to...
Methods and apparatuses for programming a programmable metallization cell (PMC) memory cell are provided. A memory device includes a programmable metallization...
ROM memory cell having defined bit line voltages
The invention relates to a ROM memory cell of a ROM memory, which provides a first predetermined potential or a second predetermined potential in the driven...
Method for setting an amplifier, and corresponding amplifier circuit
An amplifier and method of setting the amplifier is presented. The amplifier is set by setting a mean value between voltage values at first and second outputs of...
Integrated test circuit arrangement and test method
An integrated test circuit arrangement is provided that contains integrated test structures, at least one integrated heating element, an integrated detection...
Miniaturized detection coil former for NMR spectroscopy
One exemplary miniaturized detection coil former for NMR spectroscopy includes a macroporous carrier material having a first surface and a second surface...
Semiconductor component with plastic housing, and process for producing
A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing;...
Method for fabricating metallic bit-line contacts
A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor...
Thin film field effect transistor with gate dielectric made of organic
material and method for fabricating the same
The gate dielectric layer of a thin film field effect transistor is formed as a multilayer layer system having at least one self assembling molecular monolayer...
Method of producing a package for semiconductor chips
The inventive method is based on the a idea of releasing a mechanical connection between the semiconductor chip and the supporting substrate during the...
Stacked die package
A stacked die package includes a substrate or interposer board that includes a contact area on a top surface and landing pads surrounding the contact area....
Integrated electronic component
An integrated electronic component having a substrate, a metal multilayer system, which is arranged at least on regions of the substrate, and a nonconductive...
Method and circuit arrangement for testing electrical modules
The invention relates to a method for testing electrical modules. A test pattern of input signals is applied to each module to be tested as test specimen, and...
Synchronous signal generator
A synchronous signal generator is provided that contains a first and second counting and delay circuit, which both are in a subhierarchical position with respect...
Method for setting up a program-controlled circuit arrangement and circuit
arrangement for execution of the method
In the case of devices with a program-controlled circuit arrangement operating program instructions are necessary for their operation. In order to reduce the...
Recovering clock and frame information from data stream
A method for transmitting a digital data stream includes recovery of data clock information and data frame information from the digital data stream. The method...
Bridge circuit to suppress echoes in communication devices
Bridge circuit for echo suppression for a reception signal of a communication device connected to a transmission line, to which can be supplied a reception...
Sense amplifier organization for twin cell memory devices
A semiconductor memory device is provided that uses a single wordline to access both storage cells of a so-called twin cell. A memory device comprises a...
Phase change memory fabricated using self-aligned processing
A memory includes transistors in rows and columns providing an array, conductive lines in columns across the array, and phase change elements contacting the...
Input circuit for receiving an input signal, and a method for adjusting an
operating point of an input circuit
The present invention relates to an input circuit for receiving an input signal in an integrated circuit, having a differential amplifier whose first input can...
Integrated charge pump
An integrated charge pump is provided, comprising: a pump capacitor having a first terminal and a second terminal; a control unit, which operates the charge pump...
Circuit arrangement and method for producing a dual-rail signal
Circuit arrangement for producing a dual-rail output signal having a signal processing apparatus with two switches, which are driven as a function of an input...
A read out device for reading out a data word from a memory cell is described. The read out device has memory cells, inputs for input variables for selecting a...
Magnetoresistive sensor element and method of assembling magnetic field
sensor elements with on-wafer...
A method of performing an on-wafer function testis provided for multiple magnetic field sensor elements on a wafer. Each sensor element includes a ...
Contact plate for use in standardizing tester channels of a tester system
and a standardization system having...
One embodiment of the invention provides a standardization module for use in standardizing tester channels of a tester unit using a standardization unit for...
SONOS memory cells and arrays and method of forming the same
A trench (2) is fabricated in a silicon body (1). The walls (4) of the trench are provided with a nitrogen implantation (6). An oxide layer between the...
Method for fabricating an NROM memory cell arrangement
In the method, trenches (9) are etched and, in between, bit lines (8) are in each case arranged on doped source drain/regions (3). Dopant is introduced into the...
Mounting method for a semiconductor component
A mounting method for a semiconductor component. The method includes application of solder material to the semiconductor component, application of at least one...
Data transmission system with reduced power consumption
System and method for reducing power consumption and noise in a transmission system with an asymmetrically terminated transmission line. A preferred embodiment...
DRAM memory cell arrangement
The present invention relates to a memory cell arrangement comprising a multiplicity of DRAM memory cells which are arranged in cell rows and cell columns and...
Electronic circuit apparatus and method for stacking electronic circuit
The invention provides an electronic circuit apparatus having a plurality of electronic circuit units (101a-101n), a circuit board (102) and a connection unit...
Driver circuit for binary signals
The invention relates to a driver circuit for binary signals, said circuit having two branch circuits which are connected in parallel with one another between an...
Input circuit for an integrated circuit
An integrated circuit includes a functional circuit, a setting memory for storing a setting data item and an input circuit for receiving signals via an input...
Electronic component comprising an electrically conductive connection
consisting of carbon nanotubes and a...
The invention provides in a preferred embodiment an electronic component comprising a first conductive layer, a non-conductive layer and a second conductive...
Method of forming a contact in a flash memory device
A method of forming a contact between a bitline and a local interconnect in a flash memory device comprises forming a hard mask layer on a planarized surface...
Electronic component with a housing package
The invention relates to an electronic component with a housing package comprising a number of layers of plastic with at least one buried interconnect layer and...
Deformation sensor and method for detecting a deformation
A sensor has a substrate having a mechanically deformable region, a magnetostrictive spin-valve sensor element being arranged to detect a mechanical deformation...
Multi-layer electrode and method of forming the same
An interconnect includes an opening formed in a dielectric layer. A conductive barrier is deposited in the opening, over which a first conductive layer is...
Semiconductor component with switching element configured to reduce
parasitic current flow
A semiconductor component is described. In one embodiment, the semiconductor component includes a switching element integrated in the semiconductor component...
Resistive semiconductor element based on a solid-state ion conductor
A nonvolatile, resistively switching memory cell has a layer of a porous dielectric between a first electrode. The dielectric is not a chalcogenide.
Method and apparatus for characterizing a recess located on a surface of a
Method and apparatus for characterizing a recess located on a surface of a substrate are provided. One embodiment of the invention provides a method for...