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Patent # Description
US-7,342,760 Circuit arrangement for protection against electrostatic discharge and voltage regulating device having a...
A circuit arrangement for protection against electrostatic discharge for a field-effect transistor is disclosed. The arrangement includes a first and a second...
US-7,342,530 Successive approximation analog/digital converter
A successive approximation analog/digital converter converting an analog input signal into a digital output value by means of a plurality of successive...
US-7,342,448 Power output stage
A class D power output stage for switching a supply voltage comprises a limiting transistor with a controllable path and a control terminal, a complementary...
US-7,342,440 Current regulator having a transistor and a measuring resistor
The invention relates to a current regulator having the following features: a first semiconductor body (1; 1') having a first and second terminal contact (11,...
US-7,342,423 Circuit and method for calculating a logical combination of two input operands
A circuit for calculating a logical combination of two input operands includes a first input for receiving a first dual rail signal having data values of the...
US-7,342,421 CMOS circuit arrangement
In an embodiment of the invention, a CMOS circuit arrangement is provided. The CMOS circuit arrangement includes a PMOS logic circuit providing a logic function,...
US-7,342,404 Device for measurement and analysis of electrical signals of an integrated circuit component
According to the invention, one or more external test connection contact points (pads; pins; balls), are provided in an integrated circuit component (chip) (1),...
US-7,342,385 Drive circuit for two switching converter stages in a voltage converter
A drive circuit is disclosed including a first feedback circuit designed to generate a first feedback signal from a first voltage to be controlled and a first...
US-7,342,320 Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and...
An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces...
US-7,342,314 Device having a useful structure and an auxiliary structure
The present invention provides a device having a useful structure which is arranged on a substrate and has a useful structure side edge. In addition, an...
US-7,342,292 Capacitor assembly having a contact electrode encircling or enclosing in rectangular shape an effective...
A capacitor assembly has a substrate, a first conductive auxiliary layer on the substrate, a capacitor dielectric, a second conductive auxiliary layer and a...
US-7,342,291 Standby current reduction over a process window with a trimmable well bias
An integrated circuit device including a plurality of MOSFETs of similar type and geometry is formed on a substrate with an ohmic contact, and an adjustable...
US-7,341,950 Method for controlling a thickness of a first layer and method for adjusting the thickness of different first...
A method for controlling a thickness of a first layer of an electrical contact of a semiconductor device, whereby the semiconductor device comprises a...
US-7,341,904 Capacitorless 1-transistor DRAM cell and fabrication method
A semiconductor device is fabricated by forming a trench in a semiconductor body. A region of dielectric material is formed within at least a lower portion of...
US-7,341,875 Semiconductor memory device with a capacitor formed therein and a method for forming the same
To integrate a capacitor device (40) into the region of a semiconductor memory device with a particularly small number of process steps, a lower electrode device...
US-7,340,826 Method for producing an electronic device connected to a printed circuit board
A configuration and also a method for the configuration in which, the configuration has at least one electronic device with associated contact connections and at...
US-7,340,659 Method of testing multiple modules on an integrated circuit
An integrated circuit (20) comprises a plurality of processing modules (3, 5, 7) which interact during the normal operation of the integrated circuit. Switches...
US-7,340,633 Method for automatically detecting the clock frequency of a system clock pulse for the configuration of a...
The present invention provides a method for automatic identification of the clock frequency of a system clock (15) for the configuration of a peripheral device...
US-7,340,539 Device connected to a bus for storing information utilized to allocate priority to data stored in storage...
A device that is connected to a bus can transmit data to one or more other devices and/or can receive data from other devices, through the bus, includes storage...
US-7,340,313 Monitoring device for monitoring internal signals during initialization of an electronic circuit
The invention provides a device for monitoring electronic circuit units during an initialization phase. The device has at least one internal data line (103) for...
US-7,340,257 Maximum likelihood estimation of the channel coefficients and of the DC offset in a digital baseband signal of...
The proposed iterative method concurrently calculates maximum likelihood estimated values for the channel coefficients (h.sub.0, . . . , h.sub.L; .theta..sub.h)...
US-7,340,224 Devices for reducing the dynamic range of signals in transmitters of communication systems
A device reduces the dynamic range of a signal at a first point along a signal processing direction in a transmitter of a communication system. The device...
US-7,339,987 Device for correcting a receiving signal
The invention relates to a device for correcting a receiver signal which is associated with an emission signal transmitted in a distorted transmission system....
US-7,339,841 Test mode method and apparatus for internal memory timing signals
A method of testing internal signals of a memory for timing marginalities which may result in unstable operation includes: delaying internal address signals of...
US-7,339,840 Memory system and method of accessing memory chips of a memory system
A memory system and method is discussed. The memory system includes a memory controller and at least one memory module on which a certain number of semiconductor...
US-7,339,837 Configurable embedded processor
A configurable processor architecture uses a common simulation database for multiple processor configurations to reduce the cost of producing customized...
US-7,339,814 Phase change memory array having equalized resistance
A memory includes memory cells, a first line coupled to the memory cells, and a second line coupled to the memory cells. A series resistance due of the first...
US-7,339,773 Method for driving a semiconductor switch and circuit configuration with a semiconductor switch
A method for driving a semiconductor switch with load current limiting and thermal protection whose maximum load current is limited and which switches off when a...
US-7,339,652 Apparatus for projecting a pattern into an image plane
An improvement of the imaging quality with simultaneous transfer of line-space gratings and peripheral structures including a MUX space is achieved using a...
US-7,339,445 BAW duplexer without phase shifter
A duplexer for connection with an antenna comprises an antenna port, a transmitting filter comprising bulk acoustic wave (BAW) resonators having a first antenna...
US-7,339,419 Filter circuit array
A filter circuit array is disclosed. In one embodiment, the filter circuit array includes a higher-order filter circuit array, wherein one energy storage per...
US-7,339,415 SC circuit arrangement
The invention relates to a linear SC circuit arrangement using integrated deep submicron technology, having at least one switched capacitor circuit which is...
US-7,339,407 DLL circuit for providing an adjustable phase relationship with respect to a periodic input signal
The invention relates to a DLL circuit for providing an adjustable time delay of a periodic input signal, said circuit having controllable delay elements which...
US-7,339,393 Gate drive circuit for an insulated gate power transistor
The invention relates to a gate drive circuit for, and in combination with, an insulated gate power transistor. The drive circuit is connected to the gate...
US-7,339,358 Switching converter and method for driving a switch in a switching converter
A switching converter has a switch, a rectifier arrangement connected to the switch, a controller arrangement providing a control signal dependent on the output...
US-7,339,237 Connection, configuration, and production of a buried semiconductor layer
A power transistor has a semiconductor volume including a plurality of transistor cells connected in parallel, a laterally oriented, highly conductive...
US-7,339,224 Trench capacitor and corresponding method of production
The invention relates to a trench capacitor, in particular for use in a semiconductor memory cell, comprising a trench (2), embodied in a substrate (1), a first...
US-7,339,186 IC chip with nanowires
Arrangement of nanowires with PN junctions between bit lines and word lines are arranged as a ROM memory cell array. A number of the nanowires have dielectric...
US-7,338,843 Method for producing an electronic component, especially a memory chip
A method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalize an integrated circuit by means of at least...
US-7,337,967 Chip card module
A chip card module having a carrier with contact areas. Arranged on the carrier lying opposite the contact areas is a semiconductor chip, which has an integrated...
US-7,337,966 Transmission interface
A data transmission method and interface for interchanging data between a reader and a chip card, wherein the data transmission interface has a variable number...
US-7,337,345 Input circuit for an electronic circuit and a method for controlling the reading-in of a data signal
The invention relates to a method for controlling the reading-in of a data signal at an input of an electrical circuit to an input latch with the aid of a clock...
US-7,337,343 Arrangement consisting of a program-controlled unit and a power chip connected to it
An arrangement including a program-controlled unit and a power chip, the power chip connected to drive electric loads in accordance with load control data, and...
US-7,337,284 Integrated semiconductor memory
An integrated semiconductor memory includes a memory cell array having memory cells for storing a datum having a first and a second data value. An input datum...
US-7,337,282 Memory system and process for controlling a memory component to achieve different kinds of memory...
According to the invention, a memory system, and a process for controlling a memory component, to achieve different kinds of memory characteristics on one and...
US-7,336,735 Viterbi decoder
Viterbi decoder for decoding a received sequence of data symbols which are coded using a predetermined coding instruction is provided. The Viterbi decoder...
US-7,336,717 Receiver circuit, in particular for a mobile radio
A radio receiver with a low intermediate frequency has a first mixer stage that can be fed with a modulated input signal and at whose output a complex...
US-7,336,625 Method and system for transmitting data via a radio interface
Transmission data are transmitted via a radio interface between an analog telephone link and a user apparatus. A base station for a cordless telephone that is...
US-7,336,552 Sense amplifier connecting/disconnecting circuit arrangement and method for operating such a circuit arrangement
An apparatus and method for operating a sense amplifier connecting/disconnecting circuit arrangement, in particular for a semiconductor memory device, including...
US-7,336,126 Subtractor circuit and power detector arrangement having that subtractor circuit
A subtractor circuit which provides, at an output, a signal that is proportional to the difference, which is applied to the input, between two signal levels is...
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