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Patent # Description
US-7,355,679 Lithography arrangement and procedure that produces a lithography
A lithography arrangement and lithographic method is described which permits exposure of a substrate with radiation simultaneously with good intensity and...
US-7,355,541 Digital/analog converter and method for digital/analog conversion of a signal
A digital/analog converter contains an input for supplying a first digital word having a first word length. A noise shaper is coupled to the input and is...
US-7,355,472 Method and device for correcting signal distortions in an amplifier device
The present invention provides a method for the correction of signal distortions in an amplifier device, wherein a digital PWM modulator is operated with a...
US-7,355,468 Voltage generator circuit, method for providing an output voltage and electronic memory device
A voltage generator circuit provides an output voltage that is higher than an input voltage. The voltage generator circuit includes an input terminal receiving...
US-7,355,465 Delay circuit with accurate time to frequency conversion
A delay circuit comprises a signal generator and a delay component. The signal generator comprises a terminal for receiving a trigger signal and an output for...
US-7,355,458 Output driver circuit and a method of transmitting an electrical signal via an output driver circuit
In an output driver circuit, the signal propagation time of an electrical signal which is to be transmitted between two selected driver stages is ascertained. If...
US-7,355,426 Universal measuring adapter system
The invention relates to a universal measuring adapter system for adapting or contacting semiconductor components in the most varied packages for electrically...
US-7,355,414 Test apparatus with low-reflection signal distribution
A test apparatus includes a signal source that generates a radio-frequency test signal and is connected to the input connection of an arrangement. The...
US-7,355,230 Transistor array for semiconductor memory devices and method for fabricating a vertical channel transistor array
A transistor array for semiconductor memory devices is provided. A plurality of semiconductor pillars extending outwardly from a bulk section of a semiconductor...
US-7,355,218 Semiconductor component with a MOS transistor
The source area (3) is highly doped, like the channel area, for the same conductance type. The drain area (4) is doped for the opposite conductance type. This...
US-7,354,816 Field effect transistor with gate spacer structure and low-resistance channel coupling
Spacer structures of field effect transistor structures are enhanced at least in sections with immobile charge carriers. The charge accumulated in the spacer...
US-7,354,797 Method for producing a plurality of electronic devices
An electronic device has external contact elements projecting from at least one external contact side of a plastic housing. The external contact elements have an...
US-7,354,778 Method for determining the end point for a cleaning etching process
A method is provided for determining the end point during cleaning etching of processing chambers by means of plasma etching, which is used for carrying out...
US-7,354,683 Lithography mask for imaging of convex structures
A lithography mask has an angled structure element (O) formed by a first opaque segment (O1) and by a second opaque segment (O2). The structure element has at...
US-7,353,712 Integrated circuitry and method for manufacturing the same
The integrated circuitry on a semiconductor substrate includes an integrated circuit arranged in a circuit area of the semiconductor substrate and a...
US-7,353,425 Data processing circuit apparatus having a data transmission unit of redundant design
The invention provides a circuit apparatus having a circuit core module (100), a controller processor unit (102) for driving and addressing the circuit core...
US-7,353,392 Method and configuration for mutual authentication of two data processing units
A method and a configuration are described for mutual authentication of two data processing units. The mutual authentication of two data processing units is...
US-7,352,830 Sliding window
In an apparatus and method for detecting a preamble in a message a shorter initial average is used to estimate the peak position peak symbol duration, and then...
US-7,352,829 Data-aided channel estimation
Forming a channel estimate for a communications channel in a communication system, which a receiver that receives over the communications channel signals...
US-7,352,776 Line terminator unit for a subscriber line
The invention relates to a line terminating device for a subscriber line which transmits and receives broadband signals via a single subscriber line, a broadband...
US-7,352,711 Circuit arrangement and method for data transmission
In the inventive circuit arrangement and appertaining method, data of at least respectively one ISDN data connection, a traditional telephone connection as well...
US-7,352,587 Power semiconductor module having a half-bridge configuration
A power semiconductor module having a carrier plate, on which at least four substrates are arranged, and having a first and a second busbar having two conductive...
US-7,352,309 Circuit arrangement for generating switch-on signals
A circuit arrangement for generating switch-on signals for driving track-and-hold elements of an analog-to-digital converter operating with interleaved timing...
US-7,352,219 Duty cycle corrector
A duty cycle corrector including a restore circuit configured to receive a differential input clock and a differential feedback clock each having crossings of a...
US-7,352,208 Integrated circuit having a plurality of output drivers
One embodiment of the invention provides an integrated circuit having a plurality of output drivers for driving signals from the integrated circuit and having a...
US-7,352,057 Semiconductor module having an internal semiconductor chip stack, and method for producing said semiconductor...
A semiconductor module having an internal semiconductor chip stack on a wiring substrate is disclosed. In one embodiment, the semiconductor chip stack has...
US-7,352,018 Non-volatile memory cells and methods for fabricating non-volatile memory cells
The invention relates to a method for fabricating stacked non-volatile memory cells. Further, the invention relates to stacked non-volatile memory cells. The...
US-7,351,642 Deglaze route to compensate for film non-uniformities after STI oxide processing
A process and method for compensating for a radial non-uniformity on a wafer that includes the steps of: centering a rotational thickness non-uniformity of a...
US-7,351,518 Composition which forms an electrically conductive resist layer and a method for patterning a photoresist using...
A composition is specified which forms an electrically conductive resist layer and comprises a resin that can be crosslinked to form a base polymer, an organic...
US-7,351,514 Method for applying a resist layer, uses of adhesive materials, and adhesive materials and resist layer
A method in which a resist layer is applied to a base layer is disclosed. The resist layer includes an adhesive material, and the adhesive force of the adhesive...
US-7,350,288 Card stiffener and insertion tool
A removable insertion tool is provided for inserting a circuit board into a socket, wherein the insertion tool generally provides an increased surface area for...
US-7,350,015 Data transmission device
A data transmission device forwards data that have been received from a first device, intended for a second device, to the second device. The data transmission...
US-7,349,724 Radio frequency arrangement and production method and also use
A radio frequency arrangement includes a first semiconductor body having on a first side a radio frequency connection location for emitting therefrom or for...
US-7,349,678 Circuit arrangement for transmitting and receiving radio signals simultaneously
A circuit arrangement for transmitting and receiving radio signals includes an amplification device with an output for transmitting signals, an input for...
US-7,349,516 Method for trimming a two-point modulator, and a two-point modulator having a trimming apparatus
A PLL circuit (1) is regulated by means of a digital modulation signal (28) at a first frequency, and is then regulated at a second frequency, by deactivation of...
US-7,349,511 Synchronous network
A synchronous network having a multiplicity of nodes which can transmit data to one another in a predefined sequence for a predefined duration is described. The...
US-7,349,508 Method for reconstructing data clocked at a symbol rate from a distorted analog signal
A method and a device for reconstructing data, clocked at a symbol rate, from a signal which has been distorted by transmission of a transmission link, are...
US-7,349,449 Multiplexer cell and multiplexer circuit arrangement and coding device for use in a multiplexer circuit...
A multiplexer cell (1) for converting an input signal (D.sub.0, D.sub.1) with a data input rate (f.sub.D) into an output signal (E) with a data output rate...
US-7,349,389 Unit and method for distributing and processing data packets
A unit for distributing and processing data packets has an administration unit for distributing the data packets to parallel-connected processor units. In this...
US-7,349,286 Memory component and addressing of memory cells
A memory component comprises a plurality of memory cells that are each assigned an address, and an address memory for storing numerical values which are uniquely...
US-7,349,283 Integrated semiconductor memory
An integrated semiconductor memory includes a test mode control circuit and at least one voltage generator for generating an operating voltage that is fed into...
US-7,349,253 Memory device and method for testing memory devices with repairable redundancy
A memory device and method for testing memory devices with repairable redundancy is disclosed. In one embodiment, both the regular memory area and the redundant...
US-7,349,251 Integrated memory circuit arrangement
A memory circuit arrangement includes a switching element per column that can be used to connect or disconnect two bit lines for memory cells of a column. The...
US-7,348,846 Amplifier arrangement
The present invention relates to an amplifier arrangement having a plurality of amplifier stages that form a series circuit. Each amplifier stage comprises a...
US-7,348,807 Electric circuit for providing a selection signal
An electric circuit for providing a selection signal being used to select a control value of a control variable which oscillates, at steady state, about a...
US-7,348,795 Configurable logic component without a local configuration memory and with a parallel configuration bus
A configurable logic component (30) does not have a local configuration memory. The configuration of the configurable logic component is defined by applied...
US-7,348,687 Driving circuit for an ignition element of a passenger protection system
Driving circuit for an ignition element of a passenger protection systemThe present invention relates to a driving circuit for an ignition element of a passenger...
US-7,348,660 Semiconductor package based on lead-on-chip architecture, the fabrication thereof and a leadframe for...
A leadframe includes a multiplicity of leads. The leads have a board level contact portion, an intermediate portion and a chip level contact portion. The...
US-7,348,647 Digital memory cell device
A digital magnetic memory cell device for read and/or write operations, having a soft-magnetic read and/or write layer system and at least one hard-magnetic...
US-7,348,646 Micromechanical capacitive transducer and method for manufacturing the same
A micromechanical capacitive converter and a method for manufacturing a micromechanical converter comprise a movable membrane and an electrically conductive face...
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