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Patent # Description
US-7,407,729 EUV magnetic contrast lithography mask and manufacture thereof
An EUV Lithography mask, a fabrication method, and use method thereof is provided. A preferred embodiment comprises a substrate, a Bragg reflector disposed upon...
US-7,406,046 Scheduler for signaling a time out
A buffer storage memory data scheduler includes a write unit writing data objects to the memory, which unit receives data packets from a data source at a...
US-7,405,996 System and method to synchronize signals in individual integrated circuit components
A synchronous output signal generated by an integrated circuit (IC) component is synchronized to an applied clock signal for each individual IC component. A...
US-7,405,991 Semiconductor device voltage supply for a system with at least two, especially stacked, semiconductor devices
The invention is directed to a system and method comprising a first semiconductor device and a second semiconductor device, wherein the first semiconductor...
US-7,405,986 Redundant wordline deactivation scheme
A method and apparatus for reducing power consumption of a memory device. The method includes initiating a precharge operation. The precharge operation includes...
US-7,405,981 Circuit for data bit inversion
An electric circuit for inverting a data bit of a data burst read out from a memory module comprises a buffer for buffering a data burst being comprised of at...
US-7,405,957 Edge pad architecture for semiconductor memory
A memory includes a wafer having at least a first and second edge, at least one memory bank array, a data path, and a plurality of data pads. The data path is...
US-7,405,688 Analogue-to-digital converter and method for converting an analogue input signal into a digital information
An analogue-to-digital converter comprises a window comparator. The window comparator comprises an input for an analogue input signal and an output for a...
US-7,405,614 Circuit arrangement having an amplifier arrangement and an offset compensation arrangement
A circuit arrangement is disclosed herein comprising an amplifier circuit having inputs configured to receive an input signal, and an output configured to...
US-7,405,598 Differential line compensation apparatus, method and system
A differential line compensation apparatus is disclosed that has a first terminal to receive a first differential signal supplied by a first trace and a second...
US-7,405,548 Circuit for generating a supply voltage
Circuit for generating a supply voltage having a voltage input connected to a voltage regulator that generates a first supply voltage and to a low-noise voltage...
US-7,405,482 High-k dielectric film, method of forming the same and related semiconductor device
A high-k dielectric film, a method of forming the high-k dielectric film, and a method of forming a related semiconductor device are provided. The high-k...
US-7,405,441 Semiconductor memory
A non-volatile semiconductor memory (30) comprising a semiconductor substrate (1) and a plurality of memory cells (19) and methods for manufacturing such a...
US-7,405,418 Memory device electrode with a surface structure
The invention relates to a memory device electrode, in particular for a resistively switching memory device, wherein the surface of the electrode is provided...
US-7,405,127 Method for producing a vertical field effect transistor
A method for producing a field effect transistor, in which a plurality of layers are in each case deposited, planarized and etched back, in particular a gate...
US-7,405,089 Method and apparatus for measuring a surface profile of a sample
In order to measure a surface profile of a sample, an imprint of the surface profile to be examined is produced in a transfer material. The sample contains...
US-7,405,028 Polymers based on cinnamic acid as a bottom antireflective coating for 157 NM photolithography
A bottom antireflective coating for photolithography at 157 nm or less, where the bottom antireflective coating includes a crosslinkable polymer which contains...
US-7,405,024 Lithographic mask, and method for covering a mask layer
A lithographic mask having a mask substrate (3) and a patterned mask layer (4) which includes mask structures (5) and can be transferred by lithography to a...
US-7,404,136 Semiconductor memory device including a signal control device and method of operating the same
A semiconductor memory device including semiconductor memory cells with at least one memory cell capable of either acting as a storage device for ECC information...
US-7,404,050 Method of operating a memory device, memory module, and a memory device comprising the memory module
There is provided a method of operating a memory device comprising at least one memory module, a corresponding memory module and a memory device comprising the...
US-7,404,018 Read latency control circuit
The invention provides a method for setting and controlling a read latency (L) by means of a FIFO-based read latency control circuit for a read access to a...
US-7,403,875 System for reconstruction of non-uniformly sampled signals
A signal processing system allows reconstruction of a non-uniformly sampled analog signal including sampling an analog signal at a sampling period of resulting...
US-7,403,442 Pulse controlled word line driver
The invention relates to a driver circuit for driving a word line of a memory. The driver circuit comprises a driver unit for deactivating the word line after an...
US-7,403,440 Electronic memory apparatus and method for operating an electronic memory apparatus
An electronic memory apparatus has a plurality of memory devices, a plurality of temperature sensors and a control unit. The memory devices each have a...
US-7,403,438 Memory array architecture and method for high-speed distribution measurements
A method includes an initial process of selecting a memory cell within the memory array and an operating condition under which the memory cell is to be tested....
US-7,403,432 Differential read-out circuit for fuse memory cells
A read-out circuit is disclosed, where the circuit reads information out of a memory unit comprising two non-volatile memory cells. The cells have different...
US-7,403,417 Non-volatile semiconductor memory device and method for operating a non-volatile memory device
Embodiments of the invention relate to non-volatile memory devices and their methods of manufacture. Embodiments comprise an array of non-volatile memory cells,...
US-7,403,079 Frequency modulator and frequency modulation method
A frequency modulation method is provided in which the frequency of a carrier signal is modulated on the basis of the frequency of a modulation signal, and in...
US-7,403,055 Duty cycle detector with first and second oscillating signals
A duty cycle detector including a first circuit, a second circuit, and a third circuit. The first circuit is configured to receive a clock signal having a first...
US-7,403,026 Electronic switching circuit, switching circuit test arrangement and method for determining the operativeness...
The invention relates to an electronic switching circuit in which a plurality of test circuit blocks is provided, whereby every test circuit block comprises a...
US-7,402,911 Multi-chip device and method for producing a multi-chip device
The present invention relates to a multi-chip device comprising a substrate having a first surface on which a number of first contact elements is provided, a...
US-7,402,860 Method for fabricating a capacitor
The present invention relates to a method of fabricating a capacitor in a semiconductor substrate. The capacitor is fabricated such that the capacitor comprises:...
US-7,402,859 Field effect semiconductor switch and method for fabricating it
A field effect semiconductor comprises a semiconductor layer having a surface, a first and a second semiconductor region in the semiconductor layer, which are...
US-7,402,490 Charge-trapping memory device and methods for operating and manufacturing the cell
To manufacture a memory device, a gate dielectric layer is formed over a semiconductor body and a gate electrode layer is formed over the gate dielectric layer....
US-7,402,487 Process for fabricating a semiconductor device having deep trench structures
A process for fabricating a semiconductor device having deep trench structures includes forming a first portion of the trench in a semiconductor substrate and a...
US-7,401,549 Arrangement for transferring information/structures to wafers
An arrangement for transferring information/structures to wafers uses a stamp on which the information/structures to be transferred have been applied as elevated...
US-7,401,270 Repair of semiconductor memory device via external command
A semiconductor integrated circuit memory device is repaired by receiving an externally-supplied signal containing failure information that identifies at least...
US-7,401,179 Integrated circuit including a memory having low initial latency
A random access memory comprises an array of memory cells and a controller. The controller is configured to access the array of memory cells in a double data...
US-7,400,995 Device and method for testing integrated circuits
A test device and method is disclosed. In one embodiment, the test device includes a precision signal generator for generating a test signal, which generator is...
US-7,400,617 Integrated voice-over-internet protocol processor
A single-chip network processor (12) for a Voice-over-Internet Protocol phone integrates a universal serial bus port (21), a pair of IEEE 802.3 MACs (40), and...
US-7,400,526 Memory element, memory read-out element and memory cell
A memory element comprises a resistance element having a first resistance value in a first state and a second resistance value in a second state, it being...
US-7,400,379 Apparatus for measuring an exposure intensity on a wafer
An apparatus for measuring an exposure intensity on a wafer is disclosed. According to one aspect, an apparatus for measuring an exposure intensity on a wafer...
US-7,399,702 Methods of forming silicide
Methods of fully siliciding semiconductive materials of semiconductor devices are disclosed. A preferred embodiment comprises depositing an alloy comprised of a...
US-7,399,690 Methods of fabricating semiconductor devices and structures thereof
Methods of forming spacers on sidewalls of features of semiconductor devices and structures thereof are disclosed. A preferred embodiment comprises a...
US-7,399,673 Method of forming a charge-trapping memory device
In a charge-trapping device having an array of memory cells, which are controlled by word lines buried in trenches within a substrate, further trenches are...
US-7,398,444 Loop-back method for measuring the interface timing of semiconductor devices with the aid of signatures and/or...
The invention relates to a method for testing a memory device with the memory device being able to be operated in a normal operating mode and a test mode and...
US-7,398,074 Integrated transceiver circuit with low interference production and sensitivity
An integrated transceiver circuit has a reception path, which in turn has a mixer unit for demodulation of a received signal. An analog/digital converter unit is...
US-7,397,727 Write burst stop function in low power DDR sDRAM
A write burst stop command function is provided for a semiconductor memory device, and in particular for a memory device having a write latency, such as is...
US-7,397,708 Technique to suppress leakage current
Embodiments of the invention generally provide a method and wordline driver having a reduced leakage current. In one embodiment, a wordline is driven to a...
US-7,397,684 Semiconductor memory array with serial control/address bus
A semiconductor memory array for operation in a data storage system with at least one semiconductor memory chip for the storage of user data and one memory...
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