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Single exposure of mask levels having a lines and spaces array using
alternating phase-shift mask
An active area pattern is formed atop a deep trench pattern with a single exposure using an alternative phase-shift mask. To prevent adjacent spaces of opposite...
Device and method for data transmission between structural units connected
by an articulated joint
A device for transmitting data between two structural units connected to one another by an articulated joint has a long service life which permits a high...
Secure data processing unit, and an associated method
A secure data processing unit has a data/program instruction memory for storing data/program instructions, an instruction line with a large number of function...
Processor for processing a program with commands including a mother
program and a sub-program
A processor for processing a program with commands, which has a mother program with a sub-program jump command and a sub-program, which is to be processed in...
Transceiver with interference signal rejection, and method for
interference signal rejection
A transceiver with interference signal rejection has a transmission path and a reception path. The transmission path is connected to a transmission amplifier...
Frequency correction in a mobile radio receiver using an analogue and a
digital control loop
A mobile communication system is provided with a system for frequency correction in a reception apparatus which has a first control system, device or loop for...
Method for transmitting frames in a wireless local area network
On the case of receiving data frame from a station, the method of the present invention instructs the repeater to replace the content of the receiver address...
Preamble generator for a multiband OFDM transceiver
Preamble generator for a multiband frequency division multplexing (OFDM) tranceiver of a wireless personal area network (WPAN) being switchable between a time...
System and method for controlling constant power dissipation
A method for controlling the constant power dissipation of a memory cell includes initially measuring the resistance of the memory cell, and subsequently...
Semiconductor memory device having a redundancy information memory
directly connected to a redundancy control...
A semiconductor memory device (M) includes a memory array (MA) having a plurality of memory cells, a redundancy array (RA) having a plurality of memory cells, a...
Semiconductor memory arrangement with branched control and address bus
A semiconductor memory arrangement for operation in a data memory system with at least one semiconductor memory chip for the storage of user data includes a...
Method for operating an electrical writable and erasable memory cell and a
memory device for electrical memories
A method is provided for operating an electrical writable and erasable memory cell, which has a channel region that can be operated in a first and a second...
Discharge circuit for a capacitive load
A circuit arrangement for the defined discharge of a capacitive load includes a first connecting terminal for connection of the load, a second connecting...
Nonvolatile memory cell arrangement
Memory transistors are arranged in a plurality of rows and columns. A first source/drain terminal of each memory transistor of a first column is connected to an...
Memory write circuit
A design for a memory array that uses bi-directional write currents and that avoids switched ground connections for memory cells, thereby reducing signal loss...
Circuit arrangement with at least two semiconductor switches and a central
A circuit arrangement includes a first semiconductor switch and at least one second semiconductor switch, each of them having a control terminal and a first and...
Driver circuit with reduced jitter between circuit domains
A circuit for coupling a logic signal from a circuit input to a circuit output includes a parallel connection of a first circuit branch and a second circuit...
Logic activation circuit
Logic activation circuit for switching a logic circuit having at least one supply voltage line on or off, said logic activation circuit having: (a) at least one...
Chip support of a leadframe for an integrated circuit package
The central region of a leadframe (101, 201, 301, 401, 501, 601, 701, 801, 901, 1001, 1101, 1201), is selectively etched to leave upright portions (104, 204,...
Method for fabricating a nonvolatile memory element and a nonvolatile
In a method for fabricating a nonvolatile memory element a substrate is provided, a nanomask structure is fabricated on the substrate and a self-assembled...
Trench and a trench capacitor and method for forming the same
A method for fabricating a trench includes providing a semiconductor substrate made of a semiconductor material. A trench is etched into a surface of the...
Device based on partially oxidized porous silicon and method for its
Device having a flat macroporous support material made of silicon and having surfaces, a plurality of pores each having a diameter in a range of from 500 nm to...
Process for producing a mask
In a process for producing a mask, layout data is provided for a semiconductor layout. The layout data is fractionated to create control data for a pattern...
Non-volatile memory card with autarkic chronometer
A non-volatile memory card is described, which comprises a chronometer powered by an autarkic, card-internal power supply with a long-term energy store. The...
Integrated circuit with a control input that can be disabled
An integrated circuit comprises a control unit, a plurality of control inputs for the provision of control signals to said control unit and a deactivation...
Devices with reciprocal wake-up function from the standby mode
Apparatus (20) having two devices (21, 22) which can be connected to one another via an interface (23, 24), where the devices (21, 22) each have an activation...
Method and device for verifying output signals of an integrated circuit
A system and method for testing an integrated circuit is provided. In one embodiment, a method includes comparing the signal level of the output signal of the...
Transmitting arrangement for mobile radio
A transmitting arrangement, in particular for mobile radio, has a quadrature modulator with an upstream, digital signal processing unit. In order to suppress...
Simulating a floating wordline condition in a memory device, and related
A memory device and methods to exploit extra or dummy wordlines in the memory device, wherein the extra wordlines are not part of a main memory area of the...
Method for writing to magnetoresistive memory cells and magnetoresistive
memory which can be written to by the...
A method for writing to the magnetoresistive memory cells of a MRAM memory, includes applying write currents respectively onto a word line and a bit line. A...
Method and apparatus for determining local variation of the reflection or
transmission behavior over a mask surface
A focused light beam is directed onto a surface patch of a mask and decomposed into partial beams by diffraction at a structure formed on the surface of the...
Wireless wheel speed sensor
In accordance with one or more aspects of the present invention, a wireless sensing system is disclosed, where the system has particular application to sensing...
Circuit arrangement having a power transistor and a drive circuit for the
Circuit arrangement having a power transistor and a drive circuit for the power transistorThe invention relates to a circuit arrangement having the following...
Electronic package and method for testing the same
An integrated circuit package includes at least two electronic circuits. A first of the at least two electronic circuits includes a digital input and a digital...
Semiconductor device with a recessed bond pad
A semiconductor device with surface-mountable outer contacts and to a process for producing it is disclosed. In one embodiment, surface-mountable outer contacts...
A phase change memory cell is disclosed. The phase change memory cell includes a first thin film spacer and a second thin film spacer. The first thin film spacer...
Charge trapping device and method of producing the charge trapping device
A charge-trapping device includes a field effect transistor, which has source and drain regions. The source and drain regions have a dopant concentration...
High-voltage module and method for producing same
The invention relates to a high-voltage module comprising a housing (9) which accommodates at least one structural component (4, 5) that is fastened on a...
EUV magnetic contrast lithography mask and manufacture thereof
An EUV Lithography mask, a fabrication method, and use method thereof is provided. A preferred embodiment comprises a substrate, a Bragg reflector disposed upon...
Scheduler for signaling a time out
A buffer storage memory data scheduler includes a write unit writing data objects to the memory, which unit receives data packets from a data source at a...
System and method to synchronize signals in individual integrated circuit
A synchronous output signal generated by an integrated circuit (IC) component is synchronized to an applied clock signal for each individual IC component. A...
Semiconductor device voltage supply for a system with at least two,
especially stacked, semiconductor devices
The invention is directed to a system and method comprising a first semiconductor device and a second semiconductor device, wherein the first semiconductor...
Redundant wordline deactivation scheme
A method and apparatus for reducing power consumption of a memory device. The method includes initiating a precharge operation. The precharge operation includes...
Circuit for data bit inversion
An electric circuit for inverting a data bit of a data burst read out from a memory module comprises a buffer for buffering a data burst being comprised of at...
Edge pad architecture for semiconductor memory
A memory includes a wafer having at least a first and second edge, at least one memory bank array, a data path, and a plurality of data pads. The data path is...
Analogue-to-digital converter and method for converting an analogue input
signal into a digital information
An analogue-to-digital converter comprises a window comparator. The window comparator comprises an input for an analogue input signal and an output for a...
Circuit arrangement having an amplifier arrangement and an offset
A circuit arrangement is disclosed herein comprising an amplifier circuit having inputs configured to receive an input signal, and an output configured to...
Differential line compensation apparatus, method and system
A differential line compensation apparatus is disclosed that has a first terminal to receive a first differential signal supplied by a first trace and a second...
Circuit for generating a supply voltage
Circuit for generating a supply voltage having a voltage input connected to a voltage regulator that generates a first supply voltage and to a low-noise voltage...
High-k dielectric film, method of forming the same and related
A high-k dielectric film, a method of forming the high-k dielectric film, and a method of forming a related semiconductor device are provided. The high-k...